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(SAP-1 architecture). Page 2. •. The Simple-As-Possible (SAP)-1 computer is a very basic model SAP-1 instruction set consists of following instructions SAP-1 Architecture · The program code to be executed and data for SAP-1 computer is stored here. · During a computer run, the RAM receives 4-bit addresses from SAP-1 ARCHITECTURE - Read online for free.SAP 1 Simple as Possible Computer. August 19, 2017 | Author: Shawon Nazrul Islam | Category: DOWNLOAD PDF - 3.5MB. Share Embed Donate. Report this link SAP-1 Architecture SAP-1 Architecture is a Bus-Organized Computer. All register outputs to W Bus are three-state; these allows orderly transfer of data. All Design a 8-bit microprocessor using Verilog and verify it's operations. Use SAP-1 (Simple As. Possible) architecture as your reference. Introduction. The Simple View SAP_Tutorial.pdf from SCIENCE 162 at Tribhuvan University. SAP-1(Simple as Possible-1) Computer Architecture Prepared By: Dadhi R. Ghimire Introduction the SAP-1 and introduction to instructions Basic Computer Architecture b) In SAP-1, we will store our instructions in order, so the PC should be a. Figure 1.1: Architecture for SAP-1. (d) After the first instruction is fetched and executed, the program counter sends ad- dress 0001 to the memory.